QUANTA · OBJECTIONS & REPLIES
The ten sharpest objections we have heard — stated in their strongest form, then answered. If you have an eleventh, write to us.
A TPU is an accelerator part: however fast, the machine is still organized around the CPU — which launches it, feeds it, collects from it. The Noeton changes the organizing principle itself: memory becomes the resident center, the CPU retires to housekeeping, the OS swaps its kernel. Parts answer "how to compute faster"; the MNA answers "what the machine revolves around".
The stack: the organizing principle in full →PIM historically died of two things: no killer workload, immature process. Both changed — LLM decode is a textbook bandwidth-bound load (GEMV-heavy, static weights) sitting squarely in PIM's sweet spot; 3D stacking is commercial; and crucially, Samsung and SK hynix are jointly standardizing LPDDR6-PIM. Standardization is the exhibit-to-product divide the last wave never crossed.
Roadmap essay 01, with six papers →KV compression bends the capacity curve, not the position on the roofline: decode still rereads all weights per token, arithmetic intensity stays constant, still pinned to the bandwidth-bound slope. Meanwhile test-time-compute models shift token budgets massively toward decode — the bandwidth-bound share of inference is growing, not shrinking. This is one of the two refinements recorded in paper v2.
Verify it yourself: the roofline lab →The heaviest objection, and we don't dodge it: network-mandatory design trades autonomy, privacy, and equity for capability density, and the paper spends a full section on those costs. Our position is to make the trade an explicit contract — degraded mode is a declared capability floor, not a failure; escalation decisions are visible and auditable. Apple's on-device + Private Cloud Compute deployment at consumer scale shows the market accepts honest tiering.
Pull the offline switch yourself →The Noeton doesn't replace the general-purpose computer any more than the GPU replaced the CPU. The housekeeping core keeps a full conventional stack; under the Model-OS, legacy applications become a class of tools — invoked by intent, executed in sandboxes. What's displaced is not general-purpose computing but the machine form organized around the general-purpose core. Your spreadsheet will run fine — it just stops being the machine's reason to exist.
Granted: the compiler is the entirety of L2's difficulty — every architectural turn (MoE, MLA, linear attention) demands a compiler chase. Our hedges: pin the abstraction at an operator-level IR rather than specific models; keep prefill in the mature GPU ecosystem and point the fabric only at decode, the slowest-changing inner loop; and partner with shipping reconfigurable silicon instead of taping out — reconfigurability is itself a hedge against drift.
Roadmap essay 03: compiler first →They validated the same mappings (kernel/process/syscall/filesystem) at the software layer, and we cite them gratefully. The difference is depth: the Noeton sinks the mapping from "a runtime atop an existing OS" into the machine's native organization — in the five-layer reference design, the Model-OS sits on a dataflow fabric and memory substrate built for it. Software proves the semantics; the full machine answers performance and energy. The two corroborate rather than substitute.
The Model-OS series: five mappings →Which is why the privilege model is a first-class citizen of the MNA, not a patch: graded side effects (reads run free / writes sandboxed / irreversible acts require a human), full audit trails, memory-snapshot rollback — a kernel that "thought wrong" can be rolled back like a transaction. The deterministic fabric makes behavior reproducible and auditable — the precondition for asking "why did the machine do that". Honestly: engineering alignment into a permission system is open research; we list it as one of the kernel's three hard problems rather than pretending it's solved.
Rubin CPX and Dynamo prove the incumbent is being pulled in our direction — but commercial gravity makes it incremental: the CUDA ecosystem, HBM margins, and rack-level economics are all tied to the current form, so the incumbent's optimal play is to keep patching the von Neumann machine, not to reorder it. Whole-machine reorganizations have always belonged to entrants: the smartphone wasn't built by Nokia, nor the cloud by Sun.
Evidence wall: every move the incumbents make →RISC began as a position polemic, the IP network as a memo, UNIX's philosophy preceded its market. A position paper's value lies not in proclamation but in falsifiability: every principle here ships with quantitative roofline/energy arguments, hands-on experiments, and a continuously updated evidence wall — and v2 publicly records where the evidence corrected us. Come falsify it; that is what publishing is for.
Download paper v2 →